D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 600
![MCU 3V 0K 144-QFP](/photos/28/61/286127/144-bfqfp_sml.jpg)
D12332VFC25
Manufacturer Part Number
D12332VFC25
Description
MCU 3V 0K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of D12332VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25
HD6412332VFC25
HD6412332VFC25
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 600 of 1246
- Download datasheet (7Mb)
12.3.3
TCNT is cleared at the rising edge of an external reset input, depending on the settings of the
CCLR1 and CCLR0 bits in TCR. The clear pulse width must be at least 1.5 states. Figure 12.7
shows the timing of this operation.
12.3.4
The OVF in TCSR is set to 1 when TCNT overflows (changes from H'FF to H'00). Figure 12.8
shows the timing of this operation.
Rev.4.00 Sep. 07, 2007 Page 568 of 1210
REJ09B0245-0400
φ
External reset
input pin
Clear signal
TCNT
Timing of TCNT External Reset
Timing of Overflow Flag (OVF) Setting
φ
TCNT
Overflow signal
OVF
Figure 12.7 Timing of Clearance by External Reset
Figure 12.8 Timing of OVF Setting
N–1
H'FF
N
H'00
H'00
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