D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 25

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

Section 15 Smart Card Interface
15.1 Overview........................................................................................................................... 665
15.2 Register Descriptions ........................................................................................................ 669
15.3 Operation........................................................................................................................... 676
15.4 Usage Notes ...................................................................................................................... 694
Section 16 A/D Converter (12 Analog Input Channel Version)
16.1 Overview........................................................................................................................... 699
16.2 Register Descriptions ........................................................................................................ 703
16.3 Interface to Bus Master ..................................................................................................... 708
16.4 Operation........................................................................................................................... 709
16.5 Interrupts ........................................................................................................................... 715
15.1.1 Features................................................................................................................ 665
15.1.2 Block Diagram..................................................................................................... 666
15.1.3 Pin Configuration................................................................................................. 667
15.1.4 Register Configuration......................................................................................... 668
15.2.1 Smart Card Mode Register (SCMR) .................................................................... 669
15.2.2 Serial Status Register (SSR) ................................................................................ 671
15.2.3 Serial Mode Register (SMR)................................................................................ 673
15.2.4 Serial Control Register (SCR).............................................................................. 675
15.3.1 Overview.............................................................................................................. 676
15.3.2 Pin Connections ................................................................................................... 676
15.3.3 Data Format ......................................................................................................... 678
15.3.4 Register Settings .................................................................................................. 680
15.3.5 Clock.................................................................................................................... 682
15.3.6 Data Transfer Operations ..................................................................................... 684
15.3.7 Operation in GSM Mode ..................................................................................... 692
15.3.8 Operation in Block Transfer Mode ...................................................................... 693
16.1.1 Features................................................................................................................ 699
16.1.2 Block Diagram..................................................................................................... 700
16.1.3 Pin Configuration................................................................................................. 701
16.1.4 Register Configuration......................................................................................... 702
16.2.1 A/D Data Registers A to D (ADDRA to ADDRD) ............................................. 703
16.2.2 A/D Control/Status Register (ADCSR) ............................................................... 704
16.2.3 A/D Control Register (ADCR) ............................................................................ 706
16.2.4 Module Stop Control Register (MSTPCR) .......................................................... 707
16.4.1 Single Mode (SCAN = 0) .................................................................................... 709
16.4.2 Scan Mode (SCAN = 1)....................................................................................... 711
16.4.3 Input Sampling and A/D Conversion Time ......................................................... 713
16.4.4 External Trigger Input Timing............................................................................. 714
..................................................................................... 665
Rev.4.00 Sep. 07, 2007 Page xxiii of xxx
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