D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 739

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

Bit 7
TRGS1
0
1
Bits 5, 4, 1, and 0—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Clock Select 1 (CKS1): Used together with the CKS bit in ADCSR to set the A/D
conversion time. See the description of the CKS bit for details.
Bit 2—Channel Select 3 (CH3): Used together with bits CH2, CH1, and CH0 in ADCSR to
select the analog input channel(s). See the description of bits CH2, CH1, and CH0 for details.
16.2.4
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the MSTP9 bit in MSTPCR is set to 1, A/D converter operation stops at the end of the bus
cycle and a transition is made to module stop mode. Registers cannot be read or written to in
module stop mode. For details, see section 21.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 9—Module Stop (MSTP9): Specifies the A/D converter module stop mode.
Bit 9
MSTP9
0
1
Bit
Initial value :
R/W
Module Stop Control Register (MSTPCR)
Bit 6
TRGS0
1
1
Description
0
0
A/D converter module stop mode cleared
A/D converter module stop mode set
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15
0
14
0
Description
A/D conversion start by external trigger (TPU) is enabled
A/D conversion start by external trigger pin (ADTRG) is enabled
A/D conversion start by external trigger is disabled
A/D conversion start by external trigger (8-bit timer) is enabled
13
1
MSTPCRH
12
1
11
1
10
1
9
1
8
1
Rev.4.00 Sep. 07, 2007 Page 707 of 1210
7
1
6
1
5
1
MSTPCRL
4
1
REJ09B0245-0400
3
1
2
1
(Initial value)
(Initial value)
1
1
0
1