D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 466

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

9.17.2
Table 9.32 shows the port G register configuration.
Table 9.32 Port G Registers
Name
Port G data direction register
Port G data register
Port G register
Port function control register 2
Notes: 1. Lower 16 bits of the address.
Port G Data Direction Register (PGDDR)
Modes 4 and 5
Modes 6 and 7
PGDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port G. PGDDR cannot be read, and bits 7 to 5 are reserved. If PGDDR is read, an
undefined value will be read.
The PG4DDR bit is initialized by a reset, and in hardware standby mode, to 1 in modes 4 and 5,
and to 0 in modes 6 and 7. PGDDR retains its prior state in software standby mode. The OPE bit
in SBYCR is used to select whether the bus control output pins retain their output state or become
high-impedance when a transition is made to software standby mode.
Rev.4.00 Sep. 07, 2007 Page 434 of 1210
REJ09B0245-0400
Bit
Initial value :
R/W
Initial value :
R/W
2. Value of bits 4 to 0.
3. Initial value depends on the mode.
Register Configuration
:
:
:
Undefined Undefined Undefined
Undefined Undefined Undefined
—
—
—
7
—
—
—
6
Abbreviation
PGDDR
PGDR
PORTG
PFCR2
—
—
—
5
PG4DDR PG3DDR PG2DDR PG1DDR PG0DDR
W
W
4
1
0
R/W
W
R/W
R
R/W
W
W
3
0
0
H'00
Undefined
Initial Value *
H'10/H'00 *
H'30
W
W
2
0
0
3
2
W
W
1
0
0
Address *
H'FEBF
H'FF6F
H'FF5F
H'FFAC
W
W
0
0
0
1