D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 724

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

15.3.7
Switching the Mode: When switching between smart card interface mode and software standby
mode, the following switching procedure should be followed in order to maintain the clock duty.
• When changing from smart card interface mode to software standby mode
[1] Set the data register (DR) and data direction register (DDR) corresponding to the SCK pin to
[2] Write 0 to the TE bit and RE bit in the serial control register (SCR) to halt the transmit/receive
[3] Write 0 to the CKE0 bit in SCR to halt the clock.
[4] Wait for one serial clock period.
[5] Write H'00 to SMR and SCMR.
[6] Make the transition to the software standby state.
• When returning to smart card interface mode from software standby mode
[7] Exit the software standby state.
[8] Set the CKE1 bit in SCR to the value for the fixed output state (current SCK pin state) when
[9] Set smart card interface mode and output the clock. Signal generation is started with the
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REJ09B0245-0400
the value for the fixed output state in software standby mode.
operation. At the same time, set the CKE1 bit to the value for the fixed output state in software
standby mode.
During this interval, clock output is fixed at the specified level, with the duty preserved.
software standby mode is initiated.
normal duty.
Operation in GSM Mode
[1] [2] [3]
Normal operation
Figure 15.9 Clock Halt and Restart Procedure
[4] [5]
[6]
Software
standby
[7]
[8] [9]
Normal operation