D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 534

MCU 3V 0K 144-QFP

D12332VFC25

Manufacturer Part Number
D12332VFC25
Description
MCU 3V 0K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12332VFC25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25
HD6412332VFC25

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.4.7
In phase counting mode, the phase difference between two external clock inputs is detected and
TCNT is incremented/decremented accordingly. This mode can be set for channels 1, 2, 4, and 5.
When phase counting mode is set, an external clock is selected as the counter input clock and
TCNT operates as an up/down-counter regardless of the setting of bits TPSC2 to TPSC0 and bits
CKEG1 and CKEG0 in TCR. However, the functions of bits CCLR1 and CCLR0 in TCR, and of
TIOR, TIER, and TGR are valid, and input capture/compare match and interrupt functions can be
used.
When overflow occurs while TCNT is counting up, the TCFV flag in TSR is set; when underflow
occurs while TCNT is counting down, the TCFU flag is set.
The TCFD bit in TSR is the count direction flag. Reading the TCFD flag provides an indication of
whether TCNT is counting up or down.
Table 10.8 shows the correspondence between external clock pins and channels.
Table 10.8 Phase Counting Mode Clock Input Pins
Channels
When channel 1 or 5 is set to phase counting mode
When channel 2 or 4 is set to phase counting mode
Example of Phase Counting Mode Setting Procedure: Figure 10.28 shows an example of the
phase counting mode setting procedure.
Rev.4.00 Sep. 07, 2007 Page 502 of 1210
REJ09B0245-0400
Phase Counting Mode
Select phase counting mode
<Phase counting mode>
Phase counting mode
Figure 10.28 Example of Phase Counting Mode Setting Procedure
Start count
[1]
[2]
[1] Select phase counting mode with bits MD3 to
[2] Set the CST bit in TSTR to 1 to start the count
MD0 in TMDR.
operation.
A-Phase
TCLKA
TCLKC
External Clock Pins
B-Phase
TCLKB
TCLKD

Related parts for D12332VFC25