D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 851
![MCU 3V 0K 144-QFP](/photos/28/61/286127/144-bfqfp_sml.jpg)
D12332VFC25
Manufacturer Part Number
D12332VFC25
Description
MCU 3V 0K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of D12332VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25
HD6412332VFC25
HD6412332VFC25
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Notes: 1. Prewriting (setting erase block data to all 0) is not necessary.
2. The values of x, y, z, α, β, γ, ε, η, θ, and N are shown in the section 22.2.6, Flash Memory Characteristics.
3. Verify data is read in 16-bit (W) units.
4. Set only one bit in EBR1or EBR2. More than one bit cannot be set.
5. Erasing is performed in block units. To erase a number of blocks, the individual blocks must be erased sequentially.
Increment
address
NG
Figure 19.42 Erase/Erase-Verify Flowchart
NG
Set block start address to verify address
H'FF dummy write to verify address
*5
Clear ESU bit in FLMCR1
Clear SWE bit in FLMCR1
Set SWE bit in FLMCR1
Set ESU bit in FLMCR1
Clear EV bit in FLMCR1
Clear E bit in FLMCR1
Set EV bit in FLMCR1
Last address of block?
Set E bit in FLMCR1
erasing of all erase
Verify data = all 1?
Set EBR1, EBR2
Read verify data
End of erasing
Disable WDT
Enable WDT
Wait (z) ms
Wait (α) μs
Wait (η) μs
Wait (x) μs
Wait (y) μs
Wait (β) μs
Wait (γ) μs
Wait (ε) μs
Wait (θ) μs
blocks?
End of
n = 1
Start
OK
OK
OK
*1
*2
NG
*2
*4
*2
Start of erase
*2
Halt erase
*2
*2
*2
*2
*3
Rev.4.00 Sep. 07, 2007 Page 819 of 1210
Clear SWE bit in FLMCR1
Clear EV bit in FLMCR1
Erase failure
Wait (η) μs
Wait (θ) μs
n ≥ N?
OK
*2
REJ09B0245-0400
NG
*2
n ← n + 1
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