D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 861

MCU 3V 0K 144-QFP

D12332VFC25

Manufacturer Part Number
D12332VFC25
Description
MCU 3V 0K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12332VFC25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412332VFC25
HD6412332VFC25

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12332VFC25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
19.20.3 PROM Mode Operation
Table 19.35 shows how the different operating modes are set when using PROM mode, and table
19.36 lists the commands used in PROM mode. Details of each mode are given below.
Memory Read Mode: Memory read mode supports byte reads.
Auto-Program Mode: Auto-program mode supports programming of 128 bytes at a time. Status
polling is used to confirm the end of auto-programming.
Auto-Erase Mode: Auto-erase mode supports automatic erasing of the entire flash memory.
Status polling is used to confirm the end of auto-erasing.
Status Read Mode: Status polling is used for auto-programming and auto-erasing, and normal
termination can be confirmed by reading the I/O
output if an error occurs.
Table 19.35 Settings for Each Operating Mode in PROM Mode
Mode
Read
Output disable
Command write
Chip disable *
Legend:
H:
L:
Hi-Z: High impedance
X:
Notes: 1. Chip disable is not a standby state; internally, it is an operation state.
High level
Low level
Don’t care
2. Ain indicates that there is also address input in auto-program mode.
3. For command writes when making a transition to auto-program or auto-erase mode,
input a high level to the FWE pin.
1
H or L
FWE
H or L
H or L *
H or L
3
L
H
CE
L
L
OE
L
H
H
X
6
signal. In status read mode, error information is
Pin Names
Rev.4.00 Sep. 07, 2007 Page 829 of 1210
WE
H
H
L
X
I/O
Data output
Hi-Z
Data input
Hi-Z
7
to I/O
REJ09B0245-0400
0
A
Ain
X
Ain *
X
18
to A
2
0

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