HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 21

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Item
10.2.1 Block Diagram
of CPG
PLL Circuit 1:
10.3 Clock Operating
Modes
Table 10.3 (1) Clock
Operating Modes
(SH7751)
10.3 Clock Operating
Modes
Table 10.4 FRQCR
Settings and Internal
Clock Frequencies
Page
271
273
274
Revision (See Manual for Details)
Description added
PLL Circuit 1: PLL circuit 1 has a function for multiplying the
clock frequency from the EXTAL pin or crystal oscillation circuit
by 6 (SH7751 and SH7751R) or 12 (SH7751R). Starting and
stopping is controlled by a frequency control register setting.
Control is performed so that the internal clock rising edge
phase matches the input clock rising edge phase.
Table amended
Table amended
FRQCR
(Lower 9 Bits)
H'000
H'002
H'004
H'008
H'00A
H'00C
H'011
H'013
H'01A
H'01C
H'023
H'02C
H'048
H'04A
H'04C
H'05A
H'05C
H'063
H'06C
H'091
H'093
H'0A3
H'0DA
H'0DC
H'0EC
H'123
H'16C
Note: Do not set values other than those shown in the table for the lower 9 bits of FRQCR.
Clock
Operating
Mode
0
1
2
3
4
5
6
MD2
0
1
Pin Combination
External
MD1
0
1
0
1
1/6
1/8
CPU Clock
1
1/2
1/3
1/4
0
MD0
1
1
0
1
0
0
1/2
Frequency
Divider
Off
Off
On
Off
On
Off
Off
Rev.4.00 Oct. 10, 2008 Page xix of xcviii
Frequency Division Ratio of Frequency Divider 2
1/3
1/6
1/6
1/6
1/8
Bus Clock
1
1/2
1/3
1/4
1/8
1/2
1/4
1/8
1/3
1/6
1/4
1/8
PLL1
On
On
On
On
On
On
Off
PLL2
On
On
On
On
On
On
Off
1/2
1/4
1/8
1/2
1/4
1/8
1/3
1/6
1/4
1/8
1/6
1/8
1/2
1/4
1/8
1/4
1/8
1/6
1/8
1/3
1/6
1/6
1/4
1/8
1/6
1/8
CPU
Clock
6
6
3
6
3
6
1
Peripheral Module Clock
(vs. Input Clock)
Bus
Clock
1/2
3/2
1
1
2
3/2
3
Frequency
REJ09B0370-0400
Peripheral
Module
Clock
3/2
1
1/2
1
3/4
3/2
1/2
FRQCR
Initial Value
H'0E1A
H'0E23
H'0E13
H'0E13
H'0E0A
H'0E0A
H'0808

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