HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 227

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
4.6.2
The IC data array is allocated to addresses H'F100 0000 to H'F1FF FFFF in the P4 area. A data
array access requires a 32-bit address field specification (when reading or writing) and a 32-bit
data field specification. The way and entry to be accessed are specified in the address field, and
the longword data to be written is specified in the data field.
In the address field, bits [31:24] have the value H'F1 indicating the IC data array, the way is
specified by bit [13], and the entry is specified by bits [12:5]. CCR.IIX has no effect on this entry
specification. Address field bits [4:2] are used for the longword data specification in the entry. As
only longword access is used, 0 should be specified for address field bits [1:0].
The data field is used for the longword data specification.
The following two kinds of operation can be used on the IC data array:
1. IC data array read
2. IC data array write
Legend:
L:
Address field
Longword data is read into the data field from the data specified by the longword specification
bits in the address field in the IC entry corresponding to the way and entry set in the address
field.
The longword data specified in the data field is written for the data specified by the longword
specification bits in the address field in the IC entry corresponding to the way and entry set in
the address field.
: Reserved bits (0 write value, undefined read value)
Data field
Longword specification bits
IC Data Array
31
31
1 1 1 1 0 0 0 1
Figure 4.13 Memory-Mapped IC Data Array
24
23
Longword data
Rev.4.00 Oct. 10, 2008 Page 127 of 1122
Way
13
12
Entry
REJ09B0370-0400
5 4
4. Caches
L
2 1 0
0

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