HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 44

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Rev.4.00 Oct. 10, 2008 Page xlii of xcviii
REJ09B0370-0400
Item
22.3.7 PIO Transfers
Figure 22.2 PIO
Memory Space Access
Figure 22.3 PIO I/O
Space Access
22.3.8 Target
Transfers
I/O-Read and I/O-Write
Commands:
Configuration-Read and
Configuration-Write
Commands:
22.3.9 DMA Transfers
DMA Arbitration
Page
936
937
939
940
945
Revision (See Manual for Details)
Figure amended
Figure amended
Note amended
Description amended
To make it possible to access two or more areas from the PCI
bus, set the address spaces so that multiple areas are covered.
Note:
Note amended
Note:
Description amended
The arbitration circuit monitors the data transfer requests (data
write requests to the FIFO when the FIFO is empty and read
requests from the FIFO when it is full) 4 DMA transfer channels
to control the data transfers. For each transfer request, a
transfer of up to 32 bytes of data is performed.
* In version 2.1 of the PCI specifications the I/O
* Version 2.1 of the PCI specifications specifies that
PCIIOBR
PCIMBR
space for PCI devices is defined as being no more
than 256 bytes. As a result, when the SH7751 is
used in a PCI non-host device, for example on an
add-in card, it may be identified as an unusable
device during device configuration because it
requires an I/O space larger than 256 bytes.
any combination of byte-enable signal (BE[3:0])
values must be allowed when accepting a
configuration access. As a result, when byte or word
access is specified by the combination of BE[3:0],
the remaining portion of the data in the longword
unit is also overwritten by the write operation.
31
31
24 23
18 17
LOCK identifier
LOCK identifier
0
0

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