HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 487

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
A2 of this LSI, and A1 of the synchronous DRAM is connected to A3 of this LSI, the value
actually written to the synchronous DRAM is the value of “X” shifted 2 bits to the right.
For example, to write H'0230 to the area 2 SDMR register, arbitrary data is written to address
H'FF900000 (address “Y”) + H'08C0 (value “X”) (= H'FF9008C0). As a result, H'0230 is written
to the SDMR register. The range of value “X” is H'0000 to H'0FFC.
Similarly, to write H'0230 to the area 3 SDMR register, arbitrary data is written to address
H'FF940000 (address “Y”) + H'08C0 (value “X”) (= H'FF9408C0). As a result, H'0230 is written
to the SDMR register. The range of value “X” is H'0000 to H'0FFC.
The lower 16 bits of the address are set in the synchronous DRAM mode register.
The burst length is 4 and 8*. Setting to SDMR writes into the following addresses in byte size.
Bus Width
32
32
Note: * SH7751R only
For a 32-bit bus:
Address
LMODE: CAS latency
BL:
WT:
17
Wrap type (0: Sequential)
Burst length
0
16
0
Burst length
4
8*
15
0
14
0
13
0
12
0
CAS Latency
1
2
3
1
2
3
←⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯⎯→
11
0
10
10 bits set in case of 32-bit bus width
0
9
0
LMO
DE2
8
Rev.4.00 Oct. 10, 2008 Page 387 of 1122
Area 2
H'FF900048
H'FF900088
H'FF9000C8
H'FF90004C
H'FF90008C
H'FF9000CC
LMO
DE1
7
LMO
DE0
6
13. Bus State Controller (BSC)
WT BL2 BL1 BL0
5
4
Area 3
H'FF940048
H'FF940088
H'FF9400C8
H'FF94004C
H'FF94008C
H'FF9400CC
REJ09B0370-0400
3
2
1
0

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