HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 926

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

21. High-performance User Debug Interface (H-UDI)
The maximum frequency of TCK (TMS, TDI, TDO) is 20 MHz. Make the TCK or this LSI CPG
setting so that the TCK frequency is lower than that of this LSI's peripheral module clock.
21.1.4
Table 21.2 shows the H-UDI registers. Except for SDBPR and SDBSR, these registers are mapped
in the control register space and can be referenced by the CPU.
Table 21.2 H-UDI Registers
Name
Instruction
register
Data register
H
Data register
L
Bypass
register
Interrupt
factor
register
Boundary
scan
register
Notes: 1. Initialized when the TRST pin goes low or when the TAP is in the Test-Logic-Reset
Rev.4.00 Oct. 10, 2008 Page 826 of 1122
REJ09B0370-0400
3. Fixed to the ground or connected to the same signal line as RESET, or to a signal line
2. The value read from H-UDI is fixed (H'FFFFFFFD).
3. 1 can be written to the LSB using the H-UDI interrupt command.
Register Configuration
that behaves in the same way. However, there is a problem when this pin is fixed to the
ground. TRST is pulled up in the chip so, when this pin is fixed to the ground via
external connection, a minute current will flow. The size of this current is determined by
the rating of the pull-up resistor. Although this current has no effect on the chip's
operation, unnecessary current will be dissipated.
state.
Abbre-
viation
SDIR
SDDR/
SDDRH
SDDRL R/W H'FFF0000A H'1FF0000A 16
SDBPR —
SDINT
SDBSR —
R
R/W H'FFF00014 H'1FF00014 16
R/W
R/W H'FFF00008 H'1FF00008 32/16
P4
Address
H'FFF00000 H'1FF00000 16
—
—
CPU Side
Area 7
Address
—
—
Access
Size
—
—
Initial
Value*
H'FFFF
Unde-
fined
Unde-
fined
Unde-
fined
H'0000
Unde-
fined
1
R/W
R/W
—
—
R/W
W*
R/W
3
Access
Size
32
—
—
1
32
—
H-UDI Side
Initial
Value*
H'FFFFFFFD
(Fixed
value*
—
—
—
H'00000000
Undefined
2
1
)