HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 247

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.6.1
(1) Power-On Reset
• Sources:
• Transition address: H'A000 0000
• Transition operations:
Power_on_reset()
{
}
⎯ RESET pin low level
⎯ When the watchdog timer overflows while the WT/IT bit is set to 1 and the RSTS bit is
Exception code H'000 is set in EXPEVT, initialization of VBR and SR is performed, and a
branch is made to PC = H'A000 0000.
In the initialization processing, the VBR register is set to H'0000 0000, and in SR, the MD,
RB, and BL bits are set to 1, the FD bit is cleared to 0, and the interrupt mask bits (IMASK)
are set to B'1111.
CPU and on-chip peripheral module initialization is performed. For details, see the register
descriptions in the relevant sections. For some CPU functions, the TRST pin and RESET pin
must be driven low. It is therefore essential to execute a power-on reset and drive the TRST
pin low when powering on.
If the RESET pin is driven high before the MRESET pin while both these pins are low, a
manual reset may occur after the power-on reset operation. The RESET pin must be driven
high at the same time as, or after, the MRESET pin.
EXPEVT = H'00000000;
VBR = H'00000000;
SR.MD = 1;
SR.RB = 1;
SR.BL = 1;
SR.IMASK = B'1111;
SR.FD=0;
Initialize_CPU();
Initialize_Module(PowerOn);
PC = H'A0000000;
cleared to 0 in WTCSR. For details, see section 10, Clock Oscillation Circuits.
Resets
Rev.4.00 Oct. 10, 2008 Page 147 of 1122
REJ09B0370-0400
5. Exceptions

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