HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 791

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bits 5 and 4—Transmit FIFO Data Number Trigger (TTRG1, TTRG0): These bits are used
to set the number of remaining transmit data bytes that sets the transmit FIFO data register empty
(TDFE) flag in the serial status register (SCFSR2). The TDFE flag is set when the number of
transmit data bytes in SCFTDR2 is equal to or less than the trigger set number shown in the
following table.
Bit 5: TTRG1
0
1
Note: Figures in parentheses are the number of empty bytes in SCFTDR2 when the flag is set.
Bit 3—Modem Control Enable (MCE): Enables the CTS2 and RTS2 modem control signals.
Bit 3: MCE
0
1
Note:
Bit 2—Transmit FIFO Data Register Reset (TFRST): Invalidates the transmit data in the
transmit FIFO data register and resets it to the empty state.
Bit 2: TFRST
0
1
Note:
Bit 1—Receive FIFO Data Register Reset (RFRST): Invalidates the receive data in the receive
FIFO data register and resets it to the empty state.
Bit 1: RFRST
0
1
Note:
*
*
*
CTS2 is fixed at active-0 regardless of the input value, and RTS2 output is also fixed at
0.
A reset operation is performed in the event of a power-on reset or manual reset.
A reset operation is performed in the event of a power-on reset or manual reset.
Bit 4: TTRG0
0
1
0
1
Description
Modem signals disabled*
Modem signals enabled
Description
Reset operation disabled*
Reset operation enabled
Description
Reset operation disabled*
Reset operation enabled
Transmit Trigger Number
8 (8)
4 (12)
2 (14)
1 (15)
16. Serial Communication Interface with FIFO (SCIF)
Rev.4.00 Oct. 10, 2008 Page 691 of 1122
REJ09B0370-0400
(Initial value)
(Initial value)
(Initial value)
(Initial value)