LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 188

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.7 (06-29-10)
14.2.2.8
BITS
31:0
Host MAC CSR Data
This field contains the value read from or written to the Host MAC CSR as
specified in the
(MAC_CSR_CMD). Upon a read, the value returned depends on the R/nW
bit in the MAC_CSR_CMD register. If R/nW is a 1, the data in this register
is from the Host MAC. If R/nW is 0, the data is the value that was last written
into this register.
Note:
Host MAC CSR Interface Data Register (MAC_CSR_DATA)
This read-write register is used in conjunction with the
(MAC_CSR_CMD)
Note: The full list of Host MAC CSR’s are described in
The MAC_CSR_CMD and MAC_CSR_DATA registers must not be
modified until the CSR Busy bit is cleared in the MAC_CSR_CMD
register.
Registers," on page
MAC," on page
Offset:
Host MAC CSR Interface Command Register
to indirectly access the Host MAC CSR’s.
112.
0A8h
DESCRIPTION
269. For more information on the Host MAC, refer to
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
188
Size:
Host MAC CSR Interface Command Register
Section 14.3, "Host MAC Control and Status
32 bits
TYPE
R/W
Chapter 9, "Host
SMSC LAN9312
00000000h
DEFAULT
Datasheet