LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 203

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.2.5.3
31:16
BITS
15:0
Sequence ID (SEQ_ID)
This field contains the Sequence ID from the 1588 Sync or Delay_Req
packet.
Source UUID High (SRC_UUID_HI)
This field contains the high 16-bits of the Source UUID from the 1588 Sync
or Delay_Req packet.
(1588_SEQ_ID_SRC_UUID_HI_RX_CAPTURE_x)
Port x 1588 Sequence ID, Source UUID High-WORD Receive Capture Register
Note: The selection between Sync or Delay_Req packets is based on the corresponding
Note: There are multiple instantiations of this register, one for each port of the LAN9312. Refer to
Note: For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to
master/slave bit in the
Section 14.2.5
the switch fabric.
Offset:
for additional information.
Port 1: 108h
Port 2: 128h
Port 0: 148h
DESCRIPTION
1588 Configuration Register
DATASHEET
203
Size:
(1588_CONFIG).
32 bits
TYPE
RO
RO
Revision 1.7 (06-29-10)
DEFAULT
0000h
0000h