LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 443

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LAN9312-NZW

Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9312-NZW

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
15.5.2
Configuration
SYMBOL
Output Drive
t
t
t
t
odad
rstia
Strap Pins
csh
css
nRST
Reset and Configuration Strap Timing
This diagram illustrates the nRST pin timing requirements and its relation to the configuration strap
pins and output drive. Assertion of nRST is not a requirement. However, if used, it must be asserted
for the minimum period specified. Please refer to
information.
Note: Device configuration straps are latched as a result of nRST assertion. Refer to
nRST input assertion time
Configuration strap pins setup to nRST deassertion
Configuration strap pins hold after nRST deassertion
Output drive after deassertion
"Configuration Straps," on page 40
Table 15.6 nRST Reset Pin Timing Values
DESCRIPTION
Figure 15.2 nRST Reset Pin Timing
t
rstia
t
DATASHEET
css
443
for details.
t
csh
t
odad
Section 4.2, "Resets," on page 36
MIN
200
200
10
30
TYP
Revision 1.7 (06-29-10)
MAX
Section 4.2.4,
for additional
UNITS
μ S
nS
nS
nS

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