LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 425

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.4.15
31:26
25:13
BITS
12:0
RESERVED
Egress Rate Port 0 Priority Queue 3
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 3. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
Egress Rate Port 0 Priority Queue 2
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 2. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
Buffer Manager Port 0 Egress Rate Priority Queue 2/3 Register (BM_EGRSS_RATE_02_03)
This register, along with the
the egress rate pacing.
Register #:
1C0Eh
DESCRIPTION
Buffer Manager Configuration Register
DATASHEET
425
Size:
32 bits
(BM_CFG), is used to configure
TYPE
R/W
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
00000h
00000h
-