LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 418

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LAN9312-NZW

Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9312-NZW

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LAN9312-NZW
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Revision 1.7 (06-29-10)
14.5.4.9
BITS
31:1
0
RESERVED
BM Ready
When set, indicates the Buffer Manager tables have finished being initialized
by the reset process. The initialization is performed upon any reset that
resets the switch fabric.
Buffer Manager Reset Status Register (BM_RST_STS)
This register indicates when the Buffer Manager has been initialized by the reset process.
Note 14.63 The default value of this bit is 0 immediately following any switch fabric reset and then self-
Register #:
sets to 1 once the ALR table is initialized.
1C08h
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
418
Size:
32 bits
TYPE
RO
RO
SS
SMSC LAN9312
Note 14.63
DEFAULT
Datasheet
-

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