LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 407

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.3.39
BITS
31:1
0
RESERVED
Interrupt Mask
When set, this bit masks interrupts from the Switch Engine. The status bits
in the
affected.
Switch Engine Interrupt Mask Register (SWE_IMR)
This register contains the Switch Engine interrupt mask, which masks the interrupts in the
Engine Interrupt Pending Register
Interrupt Mask bit. Clearing this bit will unmask the interrupts. Refer to
on page 49
Switch Engine Interrupt Pending Register (SWE_IPR)
Register #:
for more information.
1880h
DESCRIPTION
(SWE_IPR). All Switch Engine interrupts are masked by setting the
DATASHEET
407
Size:
are not
32 bits
Chapter 5, "System Interrupts,"
TYPE
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
1b
-
Switch