LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 370

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.7 (06-29-10)
14.5.3.4
BITS
31:0
MAC Address
This field contains the first 32 bits of the ALR entry. These bits correspond
to the first 32 bits of the MAC address. Bit 0 holds the LSB of the first byte
(the multicast bit).
Switch Engine ALR Read Data 0 Register (SWE_ALR_RD_DAT_0)
This register is used in conjunction with the
(SWE_ALR_RD_DAT_1)
loaded via the Get First Entry or Get Next Entry commands in the
Register
the
Switch Engine ALR Read Data 1 Register (SWE_ALR_RD_DAT_1)
Register #:
(SWE_ALR_CMD). This register is only valid when either of the Valid or End of Table bits in
to read the ALR table. It contains the first 32 bits of the ALR entry and is
1805h
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
370
Size:
Switch Engine ALR Read Data 1 Register
32 bits
Switch Engine ALR Command
are set.
TYPE
RO
SMSC LAN9312
00000000h
DEFAULT
Datasheet