LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 412

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.7 (06-29-10)
14.5.4.3
31:16
BITS
15:8
7:0
RESERVED
Pause Level Low
These bits specify the buffer usage level during times when 2 or 3 ports are
active.
Each buffer is 128 bytes.
Note:
Pause Level High
These bits specify the buffer usage level during times when 1 port is active.
Each buffer is 128 bytes.
Note:
Buffer Manager Flow Control Pause Level Register (BM_FC_PAUSE_LVL)
This register configures the buffer usage level when a Pause frame or backpressure is sent.
A port is “active” when 36 buffers are in use for that port.
A port is “active” when 36 buffers are in use for that port.
Register #:
1C02h
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
412
Size:
32 bits
TYPE
R/W
R/W
RO
SMSC LAN9312
DEFAULT
3Ch
21h
Datasheet
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