LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 250

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.7 (06-29-10)
14.2.8.3
31:16
BITS
15:0
RESERVED
(See
PHY ID
This field contains the MSB of the Virtual PHY OUI
Virtual PHY Identification MSB Register (VPHY_ID_MSB)
This read/write register contains the MSB of the Virtual PHY Organizationally Unique Identifier (OUI).
The LSB of the Virtual PHY OUI is contained in the
(VPHY_ID_LSB).
Note 14.23 The reserved bits 31-16 are used to pad the register to 32-bits so that each register is on
Note 14.24 IEEE allows a value of zero in each of the 32-bits of the PHY Identifier.
Note
14.23)
Offset:
Index (decimal):
a DWORD boundary. When accessed serially (through the MII management protocol), the
register is 16-bits wide.
1C8h
2
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
250
Size:
(Note
14.24).
Virtual PHY Identification LSB Register
32 bits
TYPE
R/W
RO
SMSC LAN9312
DEFAULT
0000h
Datasheet
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