LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 92

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.7 (06-29-10)
7.2.5.1
7.2.5.2
7.2.5.3
7.2.5.4
PHY Pause Flow Control
The Port 1 & 2 PHYs are capable of generating and receiving pause flow control frames per the IEEE
802.3 specification. The PHYs advertised pause flow control abilities are set via bits 10 (Symmetric
Pause) and 11 (Asymmetric Pause) of the
(PHY_AN_ADV_x). This allows the PHY to advertise its flow control abilities and auto-negotiate the
flow control settings with its link partner. The default values of these bits are determined via
configuration straps as defined in
Register (PHY_AN_ADV_x)," on page
The pause flow control settings may also be manually set via the manual flow control registers
Manual Flow Control Register (MANUAL_FC_1)
(MANUAL_FC_2). These registers allow the switch fabric ports flow control settings to be manually set
when auto-negotiation is disabled or the Manual Flow Control Select bit 0 is set. The currently enabled
duplex and flow control settings can also be monitored via these registers. The flow control values in
the
values of the manual flow control register. Refer to
page 58
Parallel Detection
If the LAN9312 is connected to a device lacking the ability to auto-negotiate (i.e. no FLPs are
detected), it is able to determine the speed of the link based on either 100M MLT-3 symbols or 10M
Normal Link Pulses. In this case the link is presumed to be half-duplex per the IEEE 802.3 standard.
This ability is known as “Parallel Detection.” This feature ensures interoperability with legacy link
partners. If a link is formed via parallel detection, then bit 0 in the
Expansion Register (PHY_AN_EXP_x)
negotiation. If a fault occurs during parallel detection, bit 4 of the
Expansion Register (PHY_AN_EXP_x)
T h e
(PHY_AN_LP_BASE_ABILITY_x)
in the received FLPs. If the link partner is not auto-negotiation capable, then this register is updated
after completion of parallel detection to reflect the speed capability of the link partner.
Restarting Auto-Negotiation
Auto-negotiation can be re-started at any time by setting bit 9 of the
(PHY_BASIC_CONTROL_x). Auto-negotiation will also re-start if the link is broken at any time. A
broken link is caused by signal loss. This may occur because of a cable break, or because of an
interruption in the signal transmitted by the Link Partner. Auto-negotiation resumes in an attempt to
determine the new link configuration.
If the management entity re-starts Auto-negotiation by writing to bit 9 of the
Register
operations. Once the internal break link time of approximately 1200ms has passed in the Auto-
negotiation state-machine, the auto-negotiation will re-start. In this case, the link partner will have also
dropped the link due to lack of a received signal, so it too will resume auto-negotiation.
Disabling Auto-Negotiation
Auto-negotiation can be disabled by clearing bit 12 of the
(PHY_BASIC_CONTROL_x). The PHY will then force its speed of operation to reflect the speed (bit
13) and duplex (bit 8) of the
speed and duplex bits in the
be ignored when auto-negotiation is enabled.
Port x PHY Auto-Negotiation Advertisement Register (PHY_AN_ADV_x)
P o r t x P H Y A u t o - N e g o t i a t i o n L i n k P a r t n e r B a s e P a g e A b i l i t y R e g i s t e r
for additional information.
(PHY_BASIC_CONTROL_x), the LAN9312 will respond by stopping all transmission/receiving
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Port x PHY Basic Control Register (PHY_BASIC_CONTROL_x)
Port x PHY Basic Control Register
is used to store the Link Partner Ability information, which is coded
DATASHEET
Section 14.4.2.5, "Port x PHY Auto-Negotiation Advertisement
293.
is cleared to indicate that the link partner is not capable of auto-
is set.
92
Port x PHY Auto-Negotiation Advertisement Register
Section 6.2.3, "Flow Control Enable Logic," on
and
Port 2 Manual Flow Control Register
Port x PHY Basic Control Register
(PHY_BASIC_CONTROL_x). The
Port x PHY Basic Control Register
Port x PHY Auto-Negotiation
Port x PHY Auto-Negotiation
Port x PHY Basic Control
are not affected by the
SMSC LAN9312
Datasheet
should
Port 1