LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 278

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Revision 1.7 (06-29-10)
14.3.7
31:16
BITS
15:0
RESERVED
MII Data
This field contains the 16-bit value read from the PHY read operation or the
16-bit data value to be written to the PHY before an MII write operation.
Host MAC MII Data Register (HMAC_MII_DATA)
This read/write register is used in conjunction with the
(HMAC_MII_ACC)
written to the PHY register specified in the HMAC_MII_ACC Register, or the read data from the PHY
register whose index is specified in the HMAC_MII_ACC Register.
Offset:
to access the internal PHY registers. This register contains either the data to be
7h
DESCRIPTION
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
278
Size:
32 bits
Host MAC MII Access Register
TYPE
R/W
RO
SMSC LAN9312
DEFAULT
0000h
Datasheet
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