LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 451

• Manufacturer Part Number: LAN9312-NZW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9312-NZW

• Lead Free Status / RoHS Status: Supplier Unconfirmed

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
15.5.10
SYMBOL
EEDI (VERIFY)
t
t
t
t
t
t
t
t
cshckh
t
t
ckhdis
dhckh
dvckh
dsckh
cshdv
ckcyc
cklcsl
ckldis
dhcsl
t
t
t
ckh
ckl
csl
EECLK
Microwire Timing
This section specifies the Microwire EEPROM interface timing requirements. Please refer to
10.2.3, "Microwire EEPROM," on page 144
EECS
EEDO
EEDI
EECLK cycle time
EECLK high time
EECLK low time
EECS high before rising edge of EECLK
EECLK falling edge to EECS low
EEDO valid before rising edge of EECLK
EEDO disable after rising edge of EECLK
EEDI setup to rising edge of EECLK
EEDI hold after rising edge of EECLK
EECLK low to EEDO data disable
EEDI valid after EECS high (VERIFY)
EEDI hold after EECS low (VERIFY)
EECS low
t
cshckh
DESCRIPTION
Table 15.14 Microwire Timing Values
Figure 15.10 Microwire Timing
t
cshdv
t
ckh
t
t
dsckh
ckcyc
DATASHEET
t
dvckh
t
ckl
451
for a functional description of this serial interface.
t
ckhdis
t
dhckh
1070
1070
1110
MIN
550
550
550
550
580
30
90
0
0
t
ckldis
t
cklcsl
t
TYP
dhcsl
t
csl
Revision 1.7 (06-29-10)
MAX
1130
570
570
600
UNITS
Section
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS