LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 429

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LAN9312-NZW

Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9312-NZW

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.4.19
31:26
25:13
BITS
12:0
RESERVED
Egress Rate Port 2 Priority Queue 3
These bits specify the egress data rate for the Port 2 priority queue 3. The
rate is specified in time per byte. The time is this value plus 1 times 20nS.
Egress Rate Port 2 Priority Queue 2
These bits specify the egress data rate for the Port 2 priority queue 2. The
rate is specified in time per byte. The time is this value plus 1 times 20nS.
Buffer Manager Port 2 Egress Rate Priority Queue 2/3 Register (BM_EGRSS_RATE_22_23)
This register, along with the
the egress rate pacing.
Register #:
1C12h
DESCRIPTION
Buffer Manager Configuration Register
DATASHEET
429
Size:
32 bits
(BM_CFG), is used to configure
TYPE
R/W
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
00000h
00000h
-

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