LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 205

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LAN9312-NZW

Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9312-NZW

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.2.5.5
BITS
31:0
Timestamp High (TS_HI)
This field contains the high 32-bits of the timestamp taken on the
transmission of a 1588 Sync or Delay_Req packet.
Port x 1588 Clock High-DWORD Transmit Capture Register (1588_CLOCK_HI_TX_CAPTURE_x)
Note: The selection between Sync or Delay_Req packets is based on the corresponding
Note: There are multiple instantiations of this register, one for each port of the LAN9312. Refer to
Note: For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to
master/slave bit in the
Section 14.2.5
the switch fabric.
Offset:
for additional information.
Port 1: 110h
Port 2: 130h
Port 0: 150h
DESCRIPTION
1588 Configuration Register
DATASHEET
205
Size:
(1588_CONFIG).
32 bits
TYPE
RO
Revision 1.7 (06-29-10)
00000000h
DEFAULT

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