LAN9312-NZW Standard Microsystems (SMSC), LAN9312-NZW Datasheet - Page 411

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LAN9312-NZW

Manufacturer Part Number
LAN9312-NZW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of LAN9312-NZW

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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
14.5.4.2
31:16
BITS
15:8
7:0
RESERVED
Drop Level Low
These bits specify the buffer limit that can be used per ingress port during
times when 2 or 3 ports are active.
Each buffer is 128 bytes.
Note:
Drop Level High
These bits specify the buffer limit that can be used per ingress port during
times when 1 port is active.
Each buffer is 128 bytes.
Note:
Buffer Manager Drop Level Register (BM_DROP_LVL)
This register configures the overall buffer usage limits.
A port is “active” when 36 buffers are in use for that port.
A port is “active” when 36 buffers are in use for that port.
Register #:
1C01h
DESCRIPTION
DATASHEET
411
Size:
32 bits
TYPE
R/W
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
49h
64h
-

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