NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 155

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

Functional Description
Table 5-26. State Transition Rules for Intel
Intel
®
ICH7 Family Datasheet
NOTES:
1.
2.
G0/S0/C0
G0/S0/C1
G0/S0/C2
G0/S0/C3
G0/S0/C4
G1/S3, or
Present
(Mobile/
(Mobile/
(Mobile/
G1/S1,
Mobile
Mobile
Mobile
G1/S4
G2/S5
State
Only)
Only)
Only)
Ultra
Ultra
Ultra
G3
Some wake events can be preserved through power failure.
Transitions from the S1–S5 or G3 states to the S0 state are deferred until BATLOW# is
inactive in mobile/Ultra Mobile configurations.
• Processor halt instruction
• Level 2 Read
• Level 3 Read (Mobile
• Level 4 Read (Mobile
• SLP_EN bit set
• Power Button Override
• Mechanical Off/Power Failure
• Any Enabled Break Event
• STPCLK# goes active
• Power Button Override
• Power Failure
• Any Enabled Break Event
• Power Button Override
• Power Failure
• Previously in C3/C4 and bus masters
• Any Enabled Break Event
• Any Bus Master Event
• Power Button Override
• Power Failure
• Previously in C4 and bus masters idle
• Any Enabled Break Event
• Any Bus Master Event
• Power Button Override
• Power Failure
• Any Enabled Wake Event
• Power Button Override
• Power Failure
• Any Enabled Wake Event
• Power Failure
• Power Returns
Only)
Only)
idle
Transition Trigger
/Ultra Mobile
/Ultra Mobile
®
ICH7
• G0/S0/C1
• G0/S0/C2
• G0/S0/C2, G0/S0/C3 or G0/S0/C4 -
• G1/Sx or G2/S5 state
• G2/S5
• G3
• G0/S0/C0
• G0/S0/C2
• G2/S5
• G3
• G0/S0/C0
• G2/S5
• G3
• C3 or C4 - depending on PDME bit (D31:F0:
• G0/S0/C0
• G0/S0/C2 - if PUME bit (D31:F0: Offset A9h:
• G2/S5
• G3
• C4 - depending on PDME bit (D31:F0: Offset
• G0/S0/C0
• G0/S0/C2 - if PUME bit (D31:F0: Offset A9h:
• G2/S5
• G3
• G0/S0/C0 (See Note 2)
• G2/S5
• G3
• G0/S0/C0 (See Note 2)
• G3
• Optional to go to S0/C0 (reboot) or G2/S5
depending on C4onC3_EN bit
(D31:F0:Offset A0h:bit 7) and
BM_STS_ZERO_EN bit (D31:F0:Offset
A9h:bit 2) (Mobile
Offset A9h: bit 4)
bit 3) is set, else G0/S0/C0
A9h: bit 4
bit 3) is set, else G0/S0/C0
(stay off until power button pressed or other
wake event). (See Note 1 and 2)
Next State
/Ultra Mobile
Only)
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