NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 578

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

578
15:12
9:7
Bit
16
11
10
6
5
4
DONE_STS — R/WC. Software can clear this by writing a 1 to it.
0 = Request Not complete
1 = Set by hardware to indicate that the request is complete.
LINK_ID_STS — RO. This field identifies the link interface.
0h = Hardwired. Indicates that it is a USB Debug Port.
Reserved. This bit returns 0 when read. Writes have no effect.
IN_USE_CNT — R/W. Set by software to indicate that the port is in use. Cleared by
software to indicate that the port is free and may be used by other software. This bit is
cleared after reset. (This bit has no effect on hardware.)
EXCEPTION_STS — RO. This field indicates the exception when the
ERROR_GOOD#_STS bit is set. This field should be ignored if the
ERROR_GOOD#_STS bit is 0.
000 = No Error. (Default)
All Other combinations are reserved
ERROR_GOOD#_STS — RO.
0 = Hardware clears this bit to 0 after the proper completion of a read or write.
1 = Error has occurred. Details on the nature of the error are provided in the
GO_CNT — WO.
0 = Hardware clears this bit when hardware sets the DONE_STS bit. (Default)
1 = Causes hardware to perform a read or write request.
NOTE: Writing a 1 to this bit when it is already set may result in undefined behavior.
WRITE_READ#_CNT — R/W. Software clears this bit to indicate that the current
request is a read. Software sets this bit to indicate that the current request is a write.
0 = Read (Default)
1 = Write
001 =Transaction error: indicates the USB 2.0 transaction had an error (CRC, bad
010 =Hardware error. Request was attempted (or in progress) when port was
(Default)
Exception field.
Note: this should not be seen, since this field should only be checked if there is
an error.
PID, timeout, etc.)
suspended or reset.
Description
EHCI Controller Registers (D29:F7)
Intel
®
ICH7 Family Datasheet