NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 824

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
Figure 23-18. Power Sequencing and Reset Signal Timings (Desktop Only)
824
NOTES:
1.
2.
VccSus1_05
V5REF_Sus
LAN_RST#,
VccSus3_3
V_CPU_IO
Vcc1_5_A,
RSMRST#
RTCRST#
Vcc1_5_B
and other
Vcc1_05
VccRTC
PWROK
Vcc3_3
Other power includes VccUSBPLL, VccDMIPLL, and VccSATAPLL. All of these power signals
to PWROK assertion. Refer to
V5REF
must independently meet the timings shown in the figure. There are no timing
interdependencies between Vcc1_05 and these other power signals. There are also no
timing interdependencies for these power signals, including Vcc1_05, to Vcc3_3 and
Vcc1_5_A/Vcc1_5_B. However, If Vcc3_3 (core well buffer) is powered before Vcc1_05
(core well logic), core well signal states are indeterminate, undefined, and may glitch prior
determinate before PWROK.
PRWOK must not glitch, even if RSMRST# is low.
power
1
t200
t203
t201
Section 3.3
t202
t204
and
t213
t209
Section 3.4
t211
t214
for a list of signals that will be
Intel
®
Electrical Characteristics
ICH7 Family Datasheet
ICH7 P
S
D
kt
d

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