NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 345

Manufacturer Part Number

NH82801GHM S L8YR

Manufacturer

Lead Free Status / RoHS Status

PCI-to-PCI Bridge Registers (D30:F0)

ICH7 Family Datasheet

PCI-to-PCI Bridge Registers

The ICH7 PCI bridge resides in PCI Device 30, Function 0 on bus #0. This implements

the buffering and control logic between PCI and the backbone. The arbitration for the

PCI bus is handled by this PCI device.

PCI Configuration Registers (D30:F0)

Address locations that are not shown should be treated as Reserved (see

for details).

PCI Bridge Register Address Map (PCI-PCI—D30:F0)

IOBASE_LIMIT

MEMBASE_LIMIT

PREF_MEM_BASE

Vendor Identification

Device Identification

Revision Identification

Primary Master Latency Timer

Secondary Master Latency Timer

I/O Base and Limit

Secondary Status

Memory Base and Limit

Prefetchable Memory Base and Limit

Prefetchable Memory Upper 32 Bits

Prefetchable Memory Limit Upper 32

Capability List Pointer

Interrupt Information

Bridge Control

Secondary PCI Device Hiding

Delayed Transaction Control

Bridge Proprietary Status

Bridge Policy Configuration

Subsystem Vendor Capability Pointer

Subsystem Vendor IDs