NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 697
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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PCI Express* Configuration Registers (Desktop and Mobile Only)
18.1.53
18.1.54
Intel
®
ICH7 Family Datasheet
V0CTL — Virtual Channel 0 Resource Control Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 114h
Default Value:
V0STS — Virtual Channel 0 Resource Status Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 11Ah
Default Value:
30:27
26:24
23:20
19:17
15:8
15:2
7:1
Bit
Bit
31
16
0
1
0
Virtual Channel Enable (EN) — RO. Always set to 1. Virtual Channel 0 cannot be
disabled.
Reserved.
Virtual Channel Identifier (VCID) — RO. This field indicates the ID to use for this virtual
channel.
Reserved.
Port Arbitration Select (PAS) — R/W. This field indicates which port table is being
programmed. The root complex takes no action on this setting since the arbitration is
fixed and there is no arbitration table.
Load Port Arbitration Table (LAT) — RO. The root port does not implement an arbitration
table for this virtual channel.
Reserved.
Transaction Class / Virtual Channel Map (TVM) — R/W. This field indicates which
transaction classes are mapped to this virtual channel. When a bit is set, this
transaction class is mapped to the virtual channel.
Reserved. Transaction class 0 must always be mapped to VC0.
Reserved.
VC Negotiation Pending (NP) — RO.
0 = Negotiation is not pending.
1 = Virtual Channel is still being negotiated with ingress ports.
Port Arbitration Tables Status (ATS). There is no port arbitration table for this VC; this
bit is reserved as 0.
Bit
7
6
5
4
3
2
1
0
800000FFh
0000h
Transaction Class
Transaction Class 7
Transaction Class 6
Transaction Class 5
Transaction Class 4
Transaction Class 3
Transaction Class 2
Transaction Class 1
Transaction Class 0
–
–
117h
11Bh
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W, RO
32 bits
RO
16 bits
697
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