NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 414

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
10.6.2.4
414
RTC_REGD—Register D (Flag Register)
(LPC I/F—D31:F0)
RTC Index:
Default Value:
Lockable:
5:0
Bit
7
6
Valid RAM and Time Bit (VRT) — R/W.
0 = This bit should always be written as a 0 for write cycle, however it will return a 1 for
1 = This bit is hardwired to 1 in the RTC power well.
Reserved. This bit always returns a 0 and should be set to 0 for write cycles.
Date Alarm — R/W. These bits store the date of month alarm value. If set to 000000b,
then a don’t care state is assumed. The host must configure the date alarm for these
bits to do anything, yet they can be written at any time. If the date alarm is not
enabled, these bits will return 0’s to mimic the functionality of the Motorola 146818B.
These bits are not affected by any reset assertion.
read cycles.
0Dh
10UUUUUU (U: Undefined) Size:
No
Description
Attribute:
Power Well:
LPC Interface Bridge Registers (D31:F0)
Intel
R/W
8-bit
RTC
®
ICH7 Family Datasheet

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