NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 840
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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Figure 25-2. Example XOR Chain Circuitry
Table 25-1. XOR Test Pattern Example
840
XOR Chain Testability Algorithm Example
XOR chain testing allows motherboard manufacturers to check component connectivity
(e.g., opens and shorts to V
Table
In this example, Vector 1 applies all 0s to the chain inputs. The outputs being non-
inverting will consistently produce a 1 at the XOR output on a good board. One short to
V
Likewise, applying Vector 7 (all 1s) to the chain inputs (given that there are an even
number of input signals in the chain), will consistently produce a 1 at the XOR chain
output on a good board. One short to VSS (or open floating to VSS) will result in a 0 at
the chain output, signaling a defect. It is important to note that the number of inputs
pulled to 1 will affect the expected chain output value. If the number of chain inputs
pulled to 1 is even, then expect 1 at the output. If the number of chain inputs pulled to
1 is odd, expect 0 at the output.
Continuing with the example in
chain in sequence, the XOR Output will toggle between 0 and 1. Any break in the
toggling sequence (e.g., “1011”) will identify the location of the short or open.
CC
Vector
(or open floating to V
1
2
3
4
5
6
7
25-1.
Input
Vcc
Pin 1
Input
Pin 1
0
1
1
1
1
1
1
Input
Pin 2
Input
Pin 2
CC
0
0
1
1
1
1
1
CC
) will result in a 0 at the chain output, signaling a defect.
or GND). An example algorithm to do this is shown in
Table
Input
Pin 3
Input
Pin 3
25-1, as the input pins are driven to 1 across the
0
0
0
1
1
1
1
Input
Pin 4
Input
Pin 4
0
0
0
0
1
1
1
Input
Pin 5
Testability (Desktop and Mobile Only)
Input
Pin 5
0
0
0
0
0
1
1
Intel
Input
Pin 6
®
ICH7 Family Datasheet
Input
Pin 6
0
0
0
0
0
0
1
Output
Chain
XOR
Output
XOR
1
0
1
0
1
0
1
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