NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 269

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
Chipset Configuration Registers
7.1.10
7.1.11
Intel
®
ICH7 Family Datasheet
V1CTL—Virtual Channel 1 Resource Control Register
Offset Address: 0020–0023h
Default Value:
V1STS—Virtual Channel 1 Resource Status Register
Offset Address: 0026–0027h
Default Value:
30:27
26:24
23:20
19:17
15:02
15:8
7:1
Bit
Bit
31
16
0
1
0
Virtual Channel Enable (EN) — R/W.
0 = Disables the VC.
1 = Enables the VC.
Reserved
Virtual Channel Identifier (ID) — R/W. This field indicates the ID to use for this
virtual channel.
Reserved
Port Arbitration Select (PAS) — R/W. This field indicates which port table is being
programmed. The only permissible value of this field is 4h for the time-based WRR
entries.
Load Port Arbitration Table (LAT) — RO/W. When set, the port arbitration table
loaded is based upon the PAS field in this register. This bit always returns 0 when
read.
Reserved
Transaction Class / Virtual Channel Map (TVM) — R/W. This field indicates
which transaction classes are mapped to this virtual channel. When a bit is set, this
transaction class is mapped to the virtual channel.
Reserved
Reserved
VC Negotiation Pending (NP) — RO.
0 = Virtual channel is Not being negotiated with ingress ports.
1 = The virtual channel is still being negotiated with ingress ports.
Port Arbitration Tables Status (ATS) — RO. This field indicates the coherency
status of the port arbitration table. This bit is set when LAT (offset 000Ch:bit 0) is
written with value 1 and PAS (offset 0014h:bits19:17) has value of 4h. This bit is
cleared after the table has been updated.
00000000h
0000h
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W, RO
32-bit
RO
16-bit
269

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