NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 358
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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358
Bit
3
2
1
0
Never Prefetch (NP) — R/W.
0 = Prefetch enabled
1 = The ICH7 will only fetch a single DW and will not enable prefetching, regardless of
Memory Read Multiple Prefetch Disable (MRMPD) — R/W.
0 = MRM commands will fetch multiple cache lines as defined by the prefetch
1 = Memory read multiple (MRM) commands will fetch only up to a single, 64-byte
Memory Read Line Prefetch Disable (MRLPD) — R/W.
0 = MRL commands will fetch multiple cache lines as defined by the prefetch algorithm.
1 = Memory read line (MRL) commands will fetch only up to a single, 64-byte aligned
Memory Read Prefetch Disable (MRPD) — R/W.
0 = MR commands will fetch up to a 64-byte aligned cache line.
1 = Memory read (MR) commands will fetch only a single DW.
the command being an Memory read (MR), Memory read line (MRL), or Memory
read multiple (MRM).
algorithm.
aligned cache line.
cache line.
Description
PCI-to-PCI Bridge Registers (D30:F0)
Intel
®
ICH7 Family Datasheet
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