NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 181

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

Functional Description
Intel
®
ICH7 Family Datasheet
If the system is in a G1 (S1–S4) state, the ICH7 sends a heartbeat message every 30–
32 seconds. If an event occurs prior to the system being shutdown, the ICH7
immediately sends an event message with the next incremented sequence number.
After the event message, the ICH7 resumes sending heartbeat messages.
10. If step 8 (reset attempt), is unsuccessful, the ICH7 continues sending heartbeats.
11. This and the following rules/steps apply if the user intervention (power button
12. After step 1 (second timeout), if the user does a Power Button Override, the system
13. After step 12 (power button override), if the user presses the power button again,
14. If step 13 (power button press) is successful in waking the system, the ICH7
15. If step 13 (power button press) is unsuccessful in waking the system, the ICH7
16. After step 1 (second timeout), if a reset is attempted (using a button that pulses
17. If step 16 (reset attempt) is successful, the BIOS is run. The ICH7 continues
18. If step 16 (reset attempt), is unsuccessful, the ICH7 continues sending heartbeats.
5. After step 4 (power button override), if the user presses the power button again,
6. If step 5 (power button press) is successful in waking the system, the ICH7
7. If step 5 (power button press) is unsuccessful in waking the system, the ICH7
8. After step 3 (third timeout), if a reset is attempted (using a button that pulses
9. If step 8 (reset attempt) is successful, the BIOS is run. The ICH7 continues sending
the system should wake to an S0 state and the processor should start executing
the BIOS.
continues sending heartbeats until the BIOS clears the SECOND_TO_STS bit. (See
note 2)
continues sending heartbeats. The ICH7 does not attempt to reboot the system
again until some external intervention occurs (reset, power failure, etc.). (See note
3)
PWROK low or via the message on the SMBus slave I/F), the ICH7 attempts to
reset the system.
heartbeats until the BIOS clears the SECOND_TO_STS bit. (See note 2)
The ICH7 does not attempt to reboot the system again without external
intervention. Note: A system that has locked up and can not be restarted with
power button press is probably broken (bad power supply, short circuit on some
bus, etc.)
press, reset, SMBus message, etc.) occur prior to the third timeout of the watchdog
timer.
goes to an S5 state. The ICH7 continues sending heartbeats at this point.
the system should wake to an S0 state and the processor should start executing
the BIOS.
continues sending heartbeats until the BIOS clears the SECOND_TO_STS bit. (See
note 2)
continues sending heartbeats. The ICH7 does not attempt to reboot the system
again until some external intervention occurs (reset, power failure, etc.). (See note
3)
PWROK low or via the message on the SMBus slave I/F), the ICH7 attempts to
reset the system.
sending heartbeats until the BIOS clears the SECOND_TO_STS bit. (See note 2)
The ICH7 does not attempt to reboot the system again without external
intervention. (See note 3)
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