NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 212

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
Figure 5-11. Intel
212
Note that the port-routing logic is the only block of logic within the ICH7 that observes
the physical (real) connect/disconnect information. The port status logic inside each of
the host controllers observes the electrical connect/disconnect information that is
generated by the port-routing logic.
Only the differential signal pairs are multiplexed/demultiplexed between the UHCI and
EHCI host controllers. The other USB functional signals are handled as follows:
The Port-Routing logic is implemented in the Suspend power well so that re-
enumeration and
re-mapping of the USB ports is not required following entering and exiting a system
sleep state in which the core power is turned off.
The ICH7 also allows the USB Debug Port traffic to be routed in and out of Port #0.
When in this mode, the Enhanced Host controller is the owner of Port #0.
• The Overcurrent inputs (OC[7:0]#) are directly routed to both controllers. An
overcurrent event is recorded in both controllers’ status registers.
®
ICH7-USB Port Connections
Port 7
Port 6
Port 5
Port 4
Port 3
Port 2
Port 1
Port 0
Debug
Port
(D29:F3)
UHCI #3
Enhanced Host Controller Logic
(D29:F2)
UHCI #2
(D29:F1)
UHCI #1
Intel
(D29:F0)
UCHI #0
®
ICH7 Family Datasheet
Functional Description

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