NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 839
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
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Compliant
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Testability (Desktop and Mobile Only)
25
Figure 25-1. XOR Chain Test Mode Selection, Entry and Testing
Intel
®
ICH7 Family Datasheet
Testability (Desktop and Mobile
Only)
The ICH7 supports XOR Chain test mode. This non-functional test mode is a dedicated
test mode when the chip is not operating in its normal manner. The XOR Chain Mode is
entered as indicated in
For chains 4 and 5, all PETx[n] signals (of that chain) must be driv en during testing.
REQ[4:1]# = 0000
REQ[4:1]# = 0001
REQ[4:1]# = 0010
REQ[4:1]# = 0011
REQ[4:1]# = 0100
REQ[4:1]# = 0111
Notes: RSMRST#, PWROK, RTCRST#, LAN_RST# must be held high during test mode and output testing.
REQ# Settings
PCICLK & DMI_CLK should be approximately 1 MHz while running/toggling
ACZ_SDOUT /
TP3 / GPIO25
RSMRST# /
LAN_RST#
DMI_CLK
EE_DOUT
REQ[4:1]#
RTCRST#
PWROK
PCICLK
Figure
XOR Chain Test Mode Selection, Entry and Testing
5ms 10ms
25-1.
Chain Select (1-5)
Held Low
DMI_CLKp = ‘0’
DMI_CLKn = ‘1’
Run 120 ms
XOR Chain
XOR 1
XOR 2
XOR 3
XOR 4
XOR 5
ALL-Z
Run 2 ms
Toggle
XOR Output Enabled
839
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