NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 510

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

12.1.34
510
PCS—Port Control and Status Register (SATA–D31:F2)
Address Offset: 92h
Default Value:
This register is only used in systems that do not support AHCI. In AHCI enabled
systems, bits[3:0] must always be set (ICH7R only) / bits[2,0] must always be set
(Mobile only), and the status of the port is controlled through AHCI memory space.
7 (Mobile
5 (Mobile
3 (Mobile
1 (Mobile
(Desktop
(Desktop
(Desktop
(Desktop
Only)
Only)
Only)
Only)
Only)
Only)
Only)
Only)
15:8
Bits
7
6
5
4
3
2
1
Reserved.
Port 3 Present (P3P) — RO. The status of this bit may change at any time. This bit
is cleared when the port is disabled via P3E. This bit is not cleared upon surprise
removal of a device.
0 = No device detected.
1 = The presence of a device on Port 3 has been detected.
Reserved
Port 2 Present (P2P) — RO. The status of this bit may change at any time. This bit
is cleared when the port is disabled via P2E. This bit is not cleared upon surprise
removal of a device.
0 = No device detected.
1 = The presence of a device on Port 2 has been detected.
Port 1 Present (P1P) — RO. The status of this bit may change at any time. This bit
is cleared when the port is disabled via P1E. This bit is not cleared upon surprise
removal of a device.
0 = No device detected.
1 = The presence of a device on Port 1 has been detected.
Reserved
Port 0 Present (P0P) — RO. The status of this bit may change at any time. This bit
is cleared when the port is disabled via P0E. This bit is not cleared upon surprise
removal of a device.
0 = No device detected.
1 = The presence of a device on Port 0 has been detected.
Port 3 Enabled (P3E) — R/W.
0 = Disabled. The port is in the ‘off’ state and cannot detect any devices.
1 = Enabled. The port can transition between the on, partial, and slumber states and
NOTE: This bit takes precedence over P3CMD.SUD (offset ABAR+298h:bit 1)
Reserved
Port 2 Enabled (P2E) — R/W.
0 = Disabled. The port is in the ‘off’ state and cannot detect any devices.
1 = Enabled. The port can transition between the on, partial, and slumber states and
NOTE: This bit takes precedence over P2CMD.SUD (offset ABAR+218h:bit 1)
Port 1 Enabled (P1E) — R/W.
0 = Disabled. The port is in the ‘off’ state and cannot detect any devices.
1 = Enabled. The port can transition between the on, partial, and slumber states and
NOTE: This bit takes precedence over P1CMD.SUD (offset ABAR+198h:bit 1)
Reserved
can detect devices.
can detect devices.
can detect devices.
0000h
–
93h
SATA Controller Registers (D31:F2) (Desktop and Mobile Only)
Description
Attribute:
Size:
Intel
R/W, R/WC, RO
16 bits
®
ICH7 Family Datasheet