NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 299
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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Chipset Configuration Registers
7.1.56
Intel
®
ICH7 Family Datasheet
FD—Function Disable Register
Offset Address: 3418–341Bh
Default Value:
The UHCI functions must be disabled from highest function number to lowest. For
example, if only three UHCIs are wanted, software must disable UHCI #4 (UD4 bit set).
When disabling UHCIs, the EHCI Structural Parameters Registers must be updated with
coherent information in “Number of Companion Controllers” and “N_Ports” fields.
When disabling a function, only the configuration space is disabled. Software must
ensure that all functionality within a controller that is not desired (such as memory
spaces, I/O spaces, and DMA engines) is disabled prior to disabling the function.
When a function is disabled, software must not attempt to re-enable it. A disabled
function can only be re-enabled by a platform reset.
31:22
Bit
21
20
19
18
17
16
Reserved
PCI Express 6 Disable (PE6D) — R/W. When disabled, the link for this port is put
into the “link down” state.
0 = PCI Express* port #6 is enabled. (Default)
1 = PCI Express port #6 is disabled.
NOTE: For ICH7-U Ultra Mobile, this bit must be set to 1.
PCI Express 5 Disable (PE5D) — R/W. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #5 is enabled. (Default)
1 = PCI Express port #5 is disabled.
NOTE: For ICH7-U Ultra Mobile, this bit must be set to 1.
PCI Express 4 Disable (PE4D) — R/W. DWhen disabled, the link for this port is put
into the “link down” state.
0 = PCI Express* port #4 is enabled. (Default)
1 = PCI Express port #4 is disabled.
NOTE: For ICH7-U Ultra Mobile, this bit must be set to 1.
PCI Express 3 Disable (PE3D) — R/W. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #3 is enabled. (Default)
1 = PCI Express port #3 is disabled.
NOTE: For ICH7-U Ultra Mobile, this bit must be set to 1.
PCI Express 2 Disable (PE2D) — R/W. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #2 is enabled. (Default)
1 = PCI Express port #2 is disabled.
NOTE: For ICH7-U Ultra Mobile, this bit must be set to 1.
PCI Express 1 Disable (PE1D) — R/W. When disabled, the link for this port is put
into the link down state.
0 = PCI Express port #1 is enabled. (Default)
1 = PCI Express port #1 is disabled.
NOTE: For ICH7-U Ultra Mobile, this bit must be set to 1.
See bit description
Description
Attribute:
Size:
R/W, RO
32-bit
299
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