NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 615

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

IDE Controller Registers (D31:F1)
15.2
Table 15-2. Bus Master IDE I/O Registers
15.2.1
Intel
®
ICH7 Family Datasheet
Bus Master IDE I/O Registers (IDE—D31:F1)
The bus master IDE function uses 16 bytes of I/O space, allocated via the BMIBA
register, located in Device 31:Function 1 Configuration space, offset 20h. All bus
master IDE I/O space registers can be accessed as byte, word, or DWord quantities.
Reading reserved bits returns an indeterminate, inconsistent value, and writes to
reserved bits have no effect (but should not be attempted). The description of the I/O
registers is shown in
BMICP—Bus Master IDE Command Register
(IDE—D31:F1)
Address Offset: BMIBASE + 00h
Default Value:
BMIBASE
+ Offset
7:4
2:1
Bit
04–07
3
00
01
02
03
Reserved. Returns 0.
Read / Write Control (RWC) — R/W. This bit sets the direction of the bus master
transfer: This bit must NOT be changed when the bus master function is active.
0 = Memory reads
1 = Memory writes
Reserved. Returns 0.
Mnemonic
BMICP
BMISP
BMIDP
—
—
00h
Table
Bus Master IDE Command Primary
Reserved
Bus Master IDE Status Primary
Reserved
Bus Master IDE Descriptor Table Pointer
Primary
15-2.
Register Name
Description
Attribute:
Size:
R/W
8 bits
xxxxxxxxh
Default
00h
00h
00h
00h
R/WC
Type
R/W,
R/W
R/W
RO
RO
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