NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 229
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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Functional Description
5.21.7.2
Table 5-56. Read Cycle Format
Table 5-57. Data Values for Slave Read Registers
Intel
®
ICH7 Family Datasheet
Format of Read Command
The external master performs Byte Read commands to the ICH7 SMBus Slave I/F. The
“Command” field (bits 18
(bits 30
shows the Read Cycle Format.
byte.
Register
18:11
27:21
37:30
8:2
Bit
10
19
20
28
29
38
39
1
9
0
1
1
2
2
3
3
:
37) contain the value that should be read from that register. Table
Start
Slave Address - 7
bits
Write
ACK
Command code - 8
bits
ACK
Repeated Start
Slave Address - 7
bits
Read
ACK
Datay Byte
NOT ACK
Stop
Description
Bits
7:0
2:0
7:3
3:0
7:4
5:0
7:6
:
11) indicate which register is being accessed. The Data field
Reserved
System Power State
000 = S0
001 = S1
010 = Reserved
011 = S3
100 = S4
101 = S5
110 = Reserved
111 = Reserved
Reserved
Frequency Strap Register
Reserved
Watchdog Timer current value
Reserved
External Microcontroller
External Microcontroller
External Microcontroller
Intel
External Microcontroller
ICH7
External Microcontroller
External Microcontroller
External Microcontroller
ICH7
ICH7
External Microcontroller
External Microcontroller
Table 5-57
®
ICH7
Driven by
shows the register mapping for the data
Description
Must match value in Receive Slave
Address register
Always 0
Indicates which register is being
accessed See
Must match value in Receive Slave
Address register
Always 1
Value depends on register being
accessed. See
Comment
Table 5-57
Table 5-57
Table 5-56
229
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