NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 675

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
PCI Express* Configuration Registers (Desktop and Mobile Only)
18.1.20
Intel
®
ICH7 Family Datasheet
INTR—Interrupt Information Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 3Ch–3Dh
Default Value:
15:8
7:0
Bit
Interrupt Pin (IPIN) — RO. This field indicates the interrupt pin driven by the root
port. At reset, this register takes on the following values that reflect the reset state of
the D28IP register in chipset configuration space:
NOTE: The value that is programmed into D28IP is always reflected in this register.
Interrupt Line (ILINE) — R/W. Default = 00h. This field is a software written value to
indicate which interrupt line (vector) the interrupt is connected to. No hardware action
is taken on this register.
Port
1
2
3
4
5
6
See bit description
Reset Value
D28IP.P1IP
D28IP.P2IP
D28IP.P3IP
D28IP.P4IP
D28IP.P5IP
D28IP.P6IP
Description
Attribute:
Size:
R/W, RO
16 bits
675

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