876784 Intel, 876784 Datasheet - Page 265

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

Chipset Configuration Registers
Table 7-1.
7.1.1
7.1.2
Intel
®
ICH7 Family Datasheet
Chipset Configuration Register Memory Map (Memory Space) (Sheet 3 of 3)
VCH—Virtual Channel Capability Header Register
Offset Address: 0000–0003h
Default Value:
VCAP1—Virtual Channel Capability #1 Register
Offset Address: 0004–0007h
Default Value:
3410–3413h
3414–3414h
3418–341Bh
341C–341Fh
31:20
19:16
31:12
11:10
15:0
9:8
6:4
2:0
Bit
Bit
Offset
7
3
Next Capability Offset (NCO) — RO.This field indicates the next item in the list.
Capability Version (CV) — RO. This field indicates support as a version 1 capability
structure.
Capability ID (CID) — RO. This field indicates this is the Virtual Channel capability
item.
Reserved
Port Arbitration Table Entry Size (PATS) — RO. This field indicates the size of the port
arbitration table is 4 bits (to allow up to 8 ports).
Reference Clock (RC) — RO. Fixed at 100 ns.
Reserved
Low Priority Extended VC Count (LPEVC) — RO. This field indicates that there are no
additional VCs of low priority with extended capabilities.
Reserved
Extended VC Count (EVC) — RO. This field indicates that there is one additional VC
(VC1) that exists with extended capabilities.
Mnemonic
10010002h
00000801h
GCS
BUC
CG
FD
General Control and Status
Backed Up Control
Function Disable
Clock Gating (Mobile/Ultra
Mobile Only)
Register Name
Description
Description
Attribute:
Size:
Attribute:
Size:
(Mobile/Ultra Mobile
See bit description
(Desktop Only)
0000000xh
0000001xb
0000000xb
00000000h
Default
RO
32-bit
RO
32-bit
Only)
R/W, RO
R/W, RO
R/WLO
Type
R/W,
R/W
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