876784 Intel, 876784 Datasheet - Page 306

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

8.1.4
Note:
306
PCISTS—PCI Status Register
(LAN Controller—B1:D8:F0)
Offset Address: 06h
Default Value:
For the writable bits, software must write a 1 to clear bits that are set. Writing a 0 to
the bit has no effect.
10:9
2:0
Bit
15
14
13
12
11
8
7
6
5
4
3
Detected Parity Error (DPE) — R/WC.
0 = Parity error Not detected.
1 = The Intel
Signaled System Error (SSE) — R/WC.
0 = Integrated LAN controller has not asserted SERR#
1 = The ICH7’s integrated LAN controller has asserted SERR#. SERR# can be routed to
Master Abort Status (RMA) — R/WC.
0 = Master Abort not generated
1 = The ICH7’s integrated LAN controller (as a PCI master) has generated a master
Received Target Abort (RTA) — R/WC.
0 = Target abort not received.
1 = The ICH7’s integrated LAN controller (as a PCI master) has received a target abort.
Signaled Target Abort (STA) — RO. Hardwired to 0. The device will not signal Target
Abort.
DEVSEL# Timing Status (DEV_STS) — RO.
01h = Medium timing.
Data Parity Error Detected (DPED) — R/WC.
0 = Parity error not detected (conditions below are not met).
1 = All of the following three conditions have been met:
1.
2.
3.
Fast Back to Back Capable (FB2BC) — RO. Hardwired to 1. The device can accept fast
back-to-back transactions.
User Definable Features (UDF) — RO. Hardwired to 0. Not implemented.
66 MHz Capable (66MHZ_CAP) — RO. Hardwired to 0. The device does not support 66
MHz PCI.
Capabilities List (CAP_LIST) — RO.
0 = The EEPROM indicates that the integrated LAN controller does not support PCI
1 = The EEPROM indicates that the integrated LAN controller supports PCI Power
Interrupt Status (INTS) — RO. This bit indicates that an interrupt is pending. It is
independent from the state of the Interrupt Enable bit in the command register.
Reserved
bus (will be set even if Parity Error Response is disabled in the PCI Command
register).
cause NMI, SMI#, or interrupt.
abort.
Power Management.
Management.
The LAN controller is acting as bus master
The LAN controller has asserted PERR# (for reads) or detected PERR# asserted
(for writes)
The Parity Error Response bit in the LAN controller’s PCI Command Register is
set.
0290h
®
–
07h
ICH7’s integrated LAN controller has detected a parity error on the PCI
LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
Description
Attribute:
Size:
Intel
RO, R/WC
16 bits
®
ICH7 Family Datasheet