876784 Intel, 876784 Datasheet - Page 669

• Manufacturer Part Number: 876784
• Manufacturer: Intel

Specifications of 876784

• Lead Free Status / RoHS Status: Compliant

PCI Express* Configuration Registers (Desktop and Mobile Only)
18.1.5
18.1.6
18.1.7
Intel
®
ICH7 Family Datasheet
RID—Revision Identification Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Offset Address: 08h
Default Value:
PI—Programming Interface Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 09h
Default Value:
SCC—Sub Class Code Register
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 0Ah
Default Value:
7:0
2:0
Bit
Bit
7:0
7:0
Bit
Bit
8
7
6
5
4
3
Revision ID — RO. Refer to the Intel
Update for the value of the Revision ID Register.
Master Data Parity Error Detected (DPED) — R/WC.
0 = No data parity error received.
1 = Root port received a completion with a data parity error on the backbone and
Fast Back to Back Capable (FB2BC) — Reserved per the PCI Express* Base
Specification.
Reserved
66 MHz Capable — Reserved per the PCI Express* Base Specification.
Capabilities List — RO. Hardwired to 1. Indicates the presence of a capabilities list.
Interrupt Status — RO. Indicates status of Hot-Plug and power management
interrupts on the root port that result in INTx# message generation.
0 = Interrupt is deasserted.
1 = Interrupt is asserted.
This bit is not set if MSI is enabled. If MSI is not enabled, this bit is set regardless of the
state of PCICMD.Interrupt Disable bit (D28:F0/F1/F2/F3/F4/F5:04h:bit 10).
Reserved
Programming Interface — RO.
00h = No specific register level programming interface defined.
Sub Class Code (SCC) — RO.
04h = PCI-to-PCI bridge.
PCIMD.PER (D28:F0/F1/F2/F3:04, bit 6) is set.
See bit description
00h
04h
®
Description
Description
Description
Description
I/O Controller Hub 7 (ICH7) Family Specification
Attribute:
Size:
Attribute:
Size:
Attribute:
Size:
RO
8 bits
RO
8 bits
RO
8 bits
669